Vp TR1 Vs VM Sin wt TRANSIFORMER TH 1 THYRISTOR Fig 1A LOAD RESISTOR Voutput RL

Introductory Circuit Analysis (13th Edition)
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ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
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GIven that SCR is triggered at wt=alpha ,the output voltage VLoad  Which is given by; VL=Vmsin wt  and io=(Vo/R)

i) Show that ; V=(Vm / 2pi) (1+Cos aplha)

ii) The maximum d.c output voltage is; Vdc(max) dm

Show that ; Vdm= (Vm/ 2pi )

Vp
TR1
TH 1
THYRISTOR
Vs VM Sin wt
TRANSIFORMER
LOAD RESISTOR
Fig 1A
(B). Given that the SCR is triggered at wt = a, the output voltage V Load
Which is given by; VL= Vm sin wt. And io = (Vo/R)
i). Show that; Vo = (Vm/2T) (1+Cos a)
ii). The maximum d.c output voltage is; Vd.c(max) = Vdm.
Show that; V dm = (Vm/2π).
Voutput
RL
9
Transcribed Image Text:Vp TR1 TH 1 THYRISTOR Vs VM Sin wt TRANSIFORMER LOAD RESISTOR Fig 1A (B). Given that the SCR is triggered at wt = a, the output voltage V Load Which is given by; VL= Vm sin wt. And io = (Vo/R) i). Show that; Vo = (Vm/2T) (1+Cos a) ii). The maximum d.c output voltage is; Vd.c(max) = Vdm. Show that; V dm = (Vm/2π). Voutput RL 9
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